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Revert "Highlight SuperCollider as Smalltalk"

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This reverts commit 6beb69167c.
This commit is contained in:
Joshua Peek
2011-06-15 13:56:30 -05:00
parent 6beb69167c
commit 5fe9701e50
2 changed files with 2 additions and 2 deletions
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2
lib/linguist/languages.yml
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@@ -646,7 +646,7 @@ Standard ML:
- .sml - .sml
SuperCollider: SuperCollider:
lexer: Smalltalk lexer: Text only
extensions: extensions:
- .sc - .sc

2
test/test_language.rb
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@@ -97,7 +97,6 @@ class TestLanguage < Test::Unit::TestCase
assert_equal Lexer['Scheme'], Language['Racket'].lexer assert_equal Lexer['Scheme'], Language['Racket'].lexer
assert_equal Lexer['Scheme'], Language['Scheme'].lexer assert_equal Lexer['Scheme'], Language['Scheme'].lexer
assert_equal Lexer['Smalltalk'], Language['Smalltalk'].lexer assert_equal Lexer['Smalltalk'], Language['Smalltalk'].lexer
assert_equal Lexer['Smalltalk'], Language['SuperCollider'].lexer
assert_equal Lexer['Smarty'], Language['Smarty'].lexer assert_equal Lexer['Smarty'], Language['Smarty'].lexer
assert_equal Lexer['Tcl'], Language['Tcl'].lexer assert_equal Lexer['Tcl'], Language['Tcl'].lexer
assert_equal Lexer['Tcsh'], Language['Tcsh'].lexer assert_equal Lexer['Tcsh'], Language['Tcsh'].lexer
@@ -122,6 +121,7 @@ class TestLanguage < Test::Unit::TestCase
assert_equal Lexer['Text only'], Language['Parrot Internal Representation'].lexer assert_equal Lexer['Text only'], Language['Parrot Internal Representation'].lexer
assert_equal Lexer['Text only'], Language['Pure Data'].lexer assert_equal Lexer['Text only'], Language['Pure Data'].lexer
assert_equal Lexer['Text only'], Language['Self'].lexer assert_equal Lexer['Text only'], Language['Self'].lexer
assert_equal Lexer['Text only'], Language['SuperCollider'].lexer
assert_equal Lexer['Text only'], Language['Textile'].lexer assert_equal Lexer['Text only'], Language['Textile'].lexer
assert_equal Lexer['Text only'], Language['VHDL'].lexer assert_equal Lexer['Text only'], Language['VHDL'].lexer
assert_equal Lexer['Text only'], Language['Verilog'].lexer assert_equal Lexer['Text only'], Language['Verilog'].lexer