Chris Drake 0a49062a02 Add Verilog/SystemVerilog filename extensions ...

Most Verilog files use the *.vh extension for header files.

Since the IEEE 1800-2009 SystemVerilog standard, it is common for
hardware and verification files written using the newer language
constructs to use the *.sv extension for design elements, and *.svh for
headers.

2013-01-30 22:02:31 -08:00

..

blob_helper.rb

Ensure lang is skipped on any binary file

2012-09-24 10:51:39 -05:00

classifier.rb

Make classify a function on the Classifier

2012-07-23 13:47:15 -05:00

file_blob.rb

only check for shebangs in executable files

2011-11-23 01:37:01 -08:00

generated.rb

Fix nil data passed to generated

2012-08-07 10:39:08 -05:00

language.rb

Add wrap flag to text languages

2012-10-07 15:34:13 -05:00

languages.yml

Add Verilog/SystemVerilog filename extensions

2013-01-30 22:02:31 -08:00

md5.rb

Fix md5 nesting

2012-07-23 16:19:56 -05:00

popular.yml

Staff only

2011-06-13 23:48:46 -05:00

repository.rb

Set unused var to _

2012-07-20 15:07:19 -05:00

samples.json

Add shell samples

2012-12-10 09:45:54 -06:00

samples.rb

Sort exts and filenames

2012-09-24 10:12:05 -05:00

tokenizer.rb

Don't explode on invalid shebang

2012-11-18 20:56:06 -06:00

vendor.yml

lib/linguist/vendor.yml: ignore Debian packaging

2012-08-15 02:07:53 +03:00