Schuyler Eldridge 7363241531 New Verilog and Coq sample files added ...

New Verilog examples and Coq examples for additional training have
been added since linguist is currently failing Coq/Verilog recognition
tasks (see #201). In case it wasn't obvious, linguist will not
currently pass these new, added test cases.

2012-07-20 10:49:12 -04:00

..

button_debounce.v

New Verilog and Coq sample files added

2012-07-20 10:49:12 -04:00

control.v

New Verilog and Coq sample files added

2012-07-20 10:49:12 -04:00

hex_display.v

New Verilog and Coq sample files added

2012-07-20 10:49:12 -04:00

mux.v

New Verilog and Coq sample files added

2012-07-20 10:49:12 -04:00

pipeline_registers.v

New Verilog and Coq sample files added

2012-07-20 10:49:12 -04:00

ps2_mouse.v

New Verilog and Coq sample files added

2012-07-20 10:49:12 -04:00

sha-256-functions.v

Move test fixtures to samples/

2012-06-22 10:09:24 -05:00

sign_extender.v

New Verilog and Coq sample files added

2012-07-20 10:49:12 -04:00

sqrt_pipelined.v

New Verilog and Coq sample files added

2012-07-20 10:49:12 -04:00

t_button_debounce.v

New Verilog and Coq sample files added

2012-07-20 10:49:12 -04:00

t_div_pipelined.v

New Verilog and Coq sample files added

2012-07-20 10:49:12 -04:00

t_sqrt_pipelined.v

New Verilog and Coq sample files added

2012-07-20 10:49:12 -04:00

vga.v

New Verilog and Coq sample files added

2012-07-20 10:49:12 -04:00